Bangalore, Karnataka, India
Low Level Testing, Verilog, NC Verilog
Talents
Education
Master of Engineering or Technology
R V College of EngineeringVisvesvaraya Technological University
2017-2019
Profile Snapshot
Naseema is based out of Bangalore & has studied VLSI Design and Embedded Systems, ME MTech-Master of Engineering or Technology from Year 2017-2019 in RVCE-R V College of Engineering, Visvesvaraya Technological University.
Naseema H Y is Skilled in Low Level Testing, Verilog, NC Verilog and other talents.