Aneek Agrawal
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Mathura, Uttar Pradesh, India - C Language, Verilog, VHDL VHSIC Hardware Description Language,
Aneek is based out of Mathura & has studied EE - Electronics Engineering, BE BTech-Bachelor of Engineering or Technology from Year 2013-2017 in GLAU-GLA University, GLA University.
Aneek Agrawal is Skilled in C Language, Verilog, VHDL VHSIC Hardware Description Language and other talents.
GLA UniversityGLA University
2013-2017