Yasaswini Vabblisetti

Hyderabad, Andhra Pradesh, India
Verilog, Python, ASIC Physical Design
Talents
Education
Bachelor of Technology, Electrical Engineering
IIT-Hyderabad-Indian Institute of TechnologyIndian Institute of Technology
2020-2024
Profile Snapshot
Yasaswini is based out of Hyderabad & has studied Electrical Engineering, B.Tech-Bachelor of Technology from Year 2020-2024 in IIT-Hyderabad-Indian Institute of Technology, Indian Institute of Technology.
Yasaswini Vabblisetti is Skilled in Verilog, Python, ASIC Physical Design and other talents.